The present disclosure relates to integrated circuit design, and more specifically, to routing systems, methods and a computer program product for performing global routing of integrated circuits based on localized routing optimization.
With designs growing in size and becoming complex in system-on-a-chip (SOC)/Microprocessor designs, a quick and efficient design construction framework requires many localized optimization support. Different parts of integrated circuit chip design have different challenges to be addressed, which in turn requires CAD tools to be configured differently as per varying design optimization objectives. The challenges may include timing, power, routability, congestion, crosstalk, and yield. Currently, efforts have been made to synthesis optimization and placement optimization. It is desirable to extend the optimization to global routing.
Therefore, heretofore unaddressed needs still exist in the art to address the aforementioned deficiencies and inadequacies.